Staff Engineer - CPU Tool Chain​/Engineering

Enphase Energy is a global energy technology company and leading provider of solar, battery, and electric vehicle charging products. Founded in 2006, Enphase transformed the solar industry with our revolutionary microinverter technology, which turns sunlight into a safe, reliable, resilient, and scalable source of energy to power our lives. Today, the Enphase Energy System helps people make, use, save, and sell their own power.

Enphase is also one of the fastest growing and innovative clean energy companies in the world, with approximately 68 million products installed across more than 145 countries.

We are building teams that are designing, developing, and manufacturing next-generation energy technologies and our work environment is fast-paced, fun and full of exciting new projects.

If you are passionate about advancing a more sustainable future, this is the perfect time to join Enphase!

About the role:
Enphase is looking for mid-level engineer with CPU Tool chain experience for ARM Cortex M* & RISC V based ASICs to join our team in Fremont, CA, USA. Currently, the team is working on the development of our next generation Mixed signal Control ASIC in 22nm technology. This role i.e., CPU tools engineer develops and maintains tools for CPU design, verification, and analysis, focusing on improving efficiency, accuracy, and productivity in the CPU development process.

What you will do :

Tool Development & Maintenance

• Develop and maintain tools for CPU design, verification, emulation and analysis.

• Create and enhance tools for tasks like architecture feasibility, algorithm mapping, performance analysis, power consumption modelling, and debugging.

• Install and maintain CPU tool chain for ARM Cortex M4 & RISC V.

• Explore, Benchmark, Deploy opensource/3rd party/EDA tools to enable SW/FW development framework.

Collaboration

• Work closely with CPU design, verification, and architecture teams to understand their needs and requirements.

• Collaborate with other engineers to ensure seamless integration of tools into the overall development workflow.

• Collaborate with System level problem solvers & act as the bridge to ASIC architecture & design.

• Work along with Unix System Administrator on tool management.

• Be the single point contact for all tools, debuggers, prototype software.

Automation and Optimization:

• Automate repetitive tasks and processes to improve efficiency.

• Optimize tools for performance and scalability.

• Develop and implement new tools and methodologies to address emerging challenges in CPU design.

Documentation and Training

• Create and maintain documentation for tools, including user guides and tutorials.

• Provide training to other engineers on how to use the tools effectively.

Who you are and what you bring:

• Minimum BS+8 years or MS+6 years’ experience in a similar job function.

• Strong programming and scripting skills (e.g., Python, C/C++, Verilog, System Verilog).

• Experience with CPU architecture and design, specifically RISC V ISA.

• Familiarity with industry-standard EDA tools and techniques.

• Knowledge of CPU verification methodologies and tools.

• Experience with debugging and performance analysis.

• Experience with processor tool chains (compiler, assembler, simulator).

• Experience with “Verilator” tool is a plus.

• Hands-on experience with RISC V tool chain installation, maintenance.

The base pay range for this position is $120,000 to $183,600. This salary range may be modified in the future. The successful candidate’s starting pay will be determined based on job-related skills, experience, education or training, work location, and market conditions. This position is also eligible for bonus, equity, and benefits.